The present disclosure relates to a reception unit that receives a data signal, and to a receiving method used in such a reception unit.
In many communication systems, a transmission unit transmits a data signal, and a clock and data recovery (CDR) circuit in a reception unit reproduces a clock signal and the data signal from the received data signal. More specifically, the CDR circuit reproduces the clock signal from the received data signal, and performs retiming on the received data signal with use of the reproduced clock signal to reproduce the data signal. Japanese Unexamined Patent Application Publication Nos. H8-213979, 2007-181000, and 2009-239510 disclose a CDR circuit using a so-called gated voltage controlled oscillator (VCO) that reproduces a clock signal and a data signal based on a burst signal.